此CPU设置并发线程数多少最合适？ - ITeye问答
cpuinfo如下：
processor : 0
vendor_id : GenuineIntel
cpu family : 6
model name : Intel(R) Xeon(R) CPU
stepping : 2
cache size : 12288 KB
physical id : 0
siblings : 8
cpu cores : 4
initial apicid : 0
fpu_exception : yes
cpuid level : 11
: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4266.49
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 1
vendor_id : GenuineIntel
cpu family : 6
model name : Intel(R) Xeon(R) CPU
stepping : 2
cache size : 12288 KB
physical id : 0
siblings : 8
cpu cores : 4
initial apicid : 2
fpu_exception : yes
cpuid level : 11
: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4266.49
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 2
vendor_id : GenuineIntel
cpu family : 6
model name : Intel(R) Xeon(R) CPU
stepping : 2
cache size : 12288 KB
physical id : 0
siblings : 8
cpu cores : 4
initial apicid : 18
fpu_exception : yes
cpuid level : 11
: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4266.49
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 3
vendor_id : GenuineIntel
cpu family : 6
model name : Intel(R) Xeon(R) CPU
stepping : 2
cache size : 12288 KB
physical id : 0
siblings : 8
cpu cores : 4
initial apicid : 20
fpu_exception : yes
cpuid level : 11
: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4266.49
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 4
vendor_id : GenuineIntel
cpu family : 6
model name : Intel(R) Xeon(R) CPU
stepping : 2
cache size : 12288 KB
physical id : 1
siblings : 8
cpu cores : 4
initial apicid : 32
fpu_exception : yes
cpuid level : 11
: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4266.58
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
processor : 5
vendor_id : GenuineIntel
cpu family : 6
model name : Intel(R) Xeon(R) CPU
stepping : 2
cache size : 12288 KB
physical id : 1
siblings : 8
cpu cores : 4
initial apicid : 34
fpu_exception : yes
cpuid level : 11
: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts rep_good xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm dca sse4_1 sse4_2 popcnt lahf_lm ida arat epb dts tpr_shadow vnmi flexpriority ept vpid
bogomips : 4266.58
clflush size : 64
cache_alignment : 64
address sizes : 40 bits physical, 48 bits virtual
power management:
请详细解释一下该机器的CPU信息，以及并发线程数设置多少最佳？
对于计算密集型任务,在拥有Ncpu个处理器的系统上,当线程池大小为N+1时,通常能实现最优的利用率,(即当计算密集型任务偶尔由于页缺失故障或者其他原因而暂停时,这个额外的现线程也能够确保CPU的时钟周期不会被浪费。)
对于包含IO操作或者其他阻塞操作的任务,由于线程并不会一直执行,因此线程池的规模应该更大.要正确的设置线程池的大小，你必须估算出任务的等待时间和计算时间的比值。这种估算不需要很精确，并且可以通过一些分析活监控工具老获得。
还可以通过另外一种方法来调节线程池的大小,在某个基准负载下，分别设置不同大小的线程池来运行应用程序,并观察CPU的利用水平。
Ncpu = number of CPUs
Ucpu = target CPU utilization, 0 &= Ucpu &= 1
W
-& =& ratio of wait time to compute time
C
要使处理器达到期望的利用率,线程池的最优大小为:
Nthreads = Ncpu * Ucpu * (1 + W/C)
参考&&java concurrency in practise&& P141
一般线程数设置为 （cpu（核数）+1）*线程处理时间，四核cpu （4+1）*5 = 20 （线程池数量）
3DNOW A multimedia extension created by AMD for its processors, based on / almost equivalent to Intel’s MMX extensions
3DNOWEXT 3DNOW Extended. Also known as AMD’s 3DNow!Enhanced 3DNow!Extensions
APIC Advanced Programmable Interrupt Controller
CLFSH/CLFlush Cache Line Flush
CMOV Conditional Move/Compare Instruction
CMP_Legacy Register showing the CPU is not Hyper-Threading capable
Constant_TSC on Intel P-4s, the TSC runs with constant frequency independent of cpu frequency when EST is used
CR8Legacy -unknown-
CX8 CMPXCHG8B Instruction. (Compare and exchange 8 bytes. Also known as F00F, which is an abbreviation of the hexadecimal encoding of an instruction that exhibits a design flaw in the majority of older Intel Pentium CPU).
CX16 CMPXCHG16B Instruction. (CMPXCHG16B allows for atomic operations on 128-bit double quadword (or oword) data types. This is useful for high resolution counters that could be updated by multiple processors (or cores). Without CMPXCHG16B the only way to perform such an operation is by using a critical section.)&
DE Debugging Extensions
DS Debug Store
DS_CPL CPL qualified Debug Store (whatever CPL might mean in this context)
DTS Could mean Debug Trace Store or Digital Thermal Sensor, depending on source
EIST/EST Enhanced Intel SpeedsTep
EPT extended Page Tables (Intel, similar to NPT on AMD)
FXSR FXSAVE/FXRSTOR. (The FXSAVE instruction writes the current state of the x87 FPU, MMX technology, Streaming SIMD Extensions, and Streaming SIMD Extensions 2 data, control, and status registers to the destination operand. The destination is a 512-byte memory location. FXRSTOR will restore the state saves).&
FXSR_OPT -unknown-
HT Hyper-Transport. Note that the same abbreviation might is also used to indicate Hyper Threading (see below)
HTT/HT Hyper-Threading. An Intel technology that allows quasi-parallel execution of different instructions on a single core. The single core is seen by applications as if it were two (or potentially more) cores. However, two true CPU cores are almost always faster than a single core with HyperThreading. This flag indicates support in the CPU when checking the flags in /proc/cpuinfo on Linux systems. For more info how you can detect active HyperThreading, see the first comment in my blog post about this page at [2]
HVM Hardware support for virtual machines (Xen abbreviation for AMD SVM / Intel VMX)
LAHF_LM Load Flags into AH Register, Long Mode.
LM Long Mode. (64bit Extensions, AMD’s AMD64 or Intel’s EM64T).
MCA Machine Check Architecture
MCE Machine Check Exception
MMX It is rumoured to stand for MultiMedia eXtension or Multiple Math or Matrix Math eXtension, but officially it is a meaningless acronym trademarked by Intel
MMXEXT MMX Extensions – an enhanced set of instructions compared to MMX
MON/MONITOR CPU Monitor
MSR RDMSR and WRMSR Support
MTRR Memory Type Range Register
NPT Nested Page Tables (AMD, similar to EPT on Intel)
NX No eXecute, a flag that can be set on memory pages to disable execution of code in these pages
PAE Physical Address Extensions. PAE is the added ability of the IA32 processor to address more than 4 GB of physical memory using Intel’s 36bit page addresses instead of the standard 32bit page addresses to access a total of 64GB of RAM. Also supported by many AMD chips
PAT Page Attribute Table
PBE Pending Break Encoding
PGE PTE Global Bit
PNI Prescott New Instruction. This was the codename for SSE3 before it was released on the Intel Prescott processor (which was later added to the Pentium 4 family name).
PSE Page Size Extensions. (See PSE36)
PSE36 Page Size Extensions 36. IA-32 supports two methods to access memory above 4 GB (32 bits), PSE and PAE. PSE is the older and far less used version. For more information, take a look at [1].
SEP SYSENTER and SYSEXIT
SS Self-Snoop
SSE Streaming SIMD Extensions. Developed by Intel for its Pentium III but also implemented by AMD processors from Athlon XP onwards
SSE2 Streaming SIMD Extensions 2. (An additional 144 SIMDs.) Introduced by Intel Pentium 4, on AMD since Athlon 64
SSE3 Streaming SIMD Extensions 3. (An additional 13 instructions) introduced with “Prescott” revision Intel Pentium 4 processors. AMD introduced SSE3 with the Athlon 64 “Venice” revision
SSSE3 Supplemental Streaming SIMD Extension 3. (SSSE3 contains 16 new discrete instructions over SSE3.) Introduced on Intel Core 2 Duo processors. No AMD chip supports SSSE3 yet.
SSE4 Streaming SIMD Extentions 4. Introduced with “Nehalem” processor in 2008. Also known as “Nehalem New Instructions (NNI)”
SSE4_1 Streaming SIMD Extentions 4.1
SSE4_2 Streaming SIMD Extentions 4.2
SVM Secure Virtual Machine. (AMD’s virtualization extensions to the 64-bit x86 architecture, equivalent to Intel’s VMX, both also known as HVM in the Xen hypervisor.)
TM Thermal Monitor
TM2 Thermal Monitor 2
tpr_shadow Shadowed Task Priority Registers (for virtualization)
TSC Time Stamp Counter
VME Virtual-8086 Mode Enhancement
VMX Intel’s equivalent to AMD’s SVM
VNMI virtual NMI (non-maskable interrupts) (for virtualization)
VPID Virtual Processor ID (for virtualization)
XTPR TPR register chipset update control messenger. Part of the APIC code
6 CPU * 4 Core * 2 HT =48 Threading.
已解决问题
未解决问题10:44:51 修改
评论CPU-Z检测的也是1个核心&&我貌似装了个优化大师&&优化了一下就这样了。评论评论我开启了&AHCI后&WIN7体验分低了好多。怒大师一看CPU核心数只有1个了。怎么回事，求指教啊&。怒大师，识别错误。可为什么WIN体验分处理器的也是这么低呢？？？问题解决，谢谢大家。具体方法和18楼说的差不多。评论注意这个地方不要选，如果你选了1或者2&启动的时候就只启动了一个CPU1或者CPU2&我原本以为选择2是2个CPU一起启动。评论你选择1或者2就成了上面的图所示，应该选择正常第一项启动
鲁大爷耍你的-&-至于分数降低``````郁闷了&那个不是和硬盘有关的么LZ是不是还装了其他东西了吖`?
笔记本导购与咨询 实体店：广州天河区岗顶太平洋B场G236。 QQ: 电话：
Re:[qwe楼]&CPU的分数才&5.2啊&&没看到吗？。。。。
AHCI应该只能影响硬盘分数最新的鲁大娘竟然识别成这样儿。。。
设置管理器里面更新下变更
鲁大师你也信...
Re:[zjf楼]&以下是引用&zjf&于&15:10:31&在7楼的发言：&
我要邪恶了~嘿嘿
Re:[zjf楼]&以下是引用&zjf&于&15:10:31&在7楼的发言：&
长城宽带是什么
换个软件看下了长城宽带&就是长城宽带啊（在广州比较多），就如中国电信宽带是什么一样的意思
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其他登录方式：问题对人有帮助，内容完整，我也想知道答案
问题没有实际价值，缺少关键内容，没有改进余地
4核8GB内存的电脑只能同时开3个虚拟机吗？
答案对人有帮助，有参考价值
答案没帮助，是错误的答案，答非所问
主流的虚拟机技术，在CPU虚拟方面是最灵活的，理论上虚拟机的cpu核数和物理机的cpu核数没有直接关系。实际情况中，如果虚拟机都处于工作状态的话，虚拟机的cpu核数应该小于和物理机的cpu核。
个人电脑的话，虚拟机个数受内存的限制更大一些。
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